Maricopa Community Colleges  DFT245   19902-19956 
Official Course Description: MCCCD Approval: 01/23/90
DFT245 19902-19956 L+L 6 Credit(s) 12 Period(s)
Integrated Circuit Design - Complimentary Metal Oxide Silicon (CMOS)
Provides entry level integrated circuit design in CMOS (Complimentary Metal Oxide Silicon) Technology. Experience in use of drafting techniques for layout and drafting of logic diagrams, schematic diagrams, stick diagrams, and integrated circuit drawings. Prerequisites: DFT243, or equivalent, or permission of department.
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MCCCD Official Course Competencies:
 
DFT245   19902-19956 Integrated Circuit Design - Complimentary Metal Oxide Silicon (CMOS)
1. Demonstrate the proper use and care of drafting instruments and equipment. (I)
2. Describe the manufacturing processes involved in the manufacture of CMOS circuits. (II)
3. Interpret logic diagrams, schematic diagrams, and stick diagrams. (III)
4. Convert logic diamgrams to schematic diagrams. (III)
5. Convert schematic diagrams to stick diagrams. (IV)
6. Utilize stick diagrams to accurately layout integrated circuits. (IV)
7. Trace electrical nodes and calculate capacitance and resistance on electrical nodes. (V)
8. Apply a given set of design rules to design integrated circuits. (VI)
9. Demonstrate the proper layout techniques for random circuitry and cells. (VIII)
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MCCCD Official Course Outline:
 
DFT245   19902-19956 Integrated Circuit Design - Complimentary Metal Oxide Silicon (CMOS)
    I. Introduction
        A. Overview of the industry
        B. Career opportunities
        C. Care of equipment
      II. CMOS Diagram
          A. Logic
          B. Schematic
          C. Node identification
          D. Nands, Nors and Inverters
          E. Truth tables
        III. Stick Diagrams
            A. Layer identification
            B. Color code
            C. Transistor makeup
            D. Topological planning
          IV. Layout
              A. Design rules
              B. Area calculator
              C. Resistance and capacitance
            V. Processing
                A. Metal gate
                B. Silicon gate
                C. Basic steps
              VI. Cell concept
                  A. Node sharing
                  B. Arrays
                  C. Area saving techniques
                  D. Single layer options
                VII. Block planning
                    A. Density studies
                    B. Schedule making
                    C. Interconnect
                  VIII. Other Components
                      A. Resistors
                      B. Capacitors
                      C. Guard rings
                      D. I/O pads
                      E. Input protection
                      F. Drivers and other large devices
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